/[MITgcm]/MITgcm/eesupp/src/barrier.F
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revision 1.4 by cnh, Tue Sep 29 18:50:56 1998 UTC revision 1.5 by cnh, Wed Oct 28 03:11:33 1998 UTC
# Line 46  C     | coherency over process caches an Line 46  C     | coherency over process caches an
46  C     | Also we have to be a bit careful regarding sequential    |  C     | Also we have to be a bit careful regarding sequential    |
47  C     | consistency - or lack of it. At the moment the code      |  C     | consistency - or lack of it. At the moment the code      |
48  C     | assumes a total store order memory model, which some     |  C     | assumes a total store order memory model, which some     |
49  C     | machines don't have! However, I have yet to find a       |  C     | machines do not have! However, I have yet to find a      |
50  C     | problem with this I think because the tolerances in      |  C     | problem with this I think because the tolerances in      |
51  C     | terms of memory ordering i.e. a little bit of reordering |  C     | terms of memory ordering i.e. a little bit of reordering |
52  C     | probably won't break the barrier mechanism!              |  C     | probably will not break the barrier mechanism!           |
53  C     | On non-cache coherent systems e.g. T3E we need to use    |  C     | On non-cache coherent systems e.g. T3E we need to use    |
54  C     | a library function to do barriers.                       |  C     | a library function to do barriers.                       |
55  C     | Note - The PANIC tests can be removed for working code   |  C     | Note - The PANIC tests can be removed for working code   |
# Line 85  CcnhDebugEnds Line 85  CcnhDebugEnds
85  C--   Check that thread number is expected range  C--   Check that thread number is expected range
86        IF ( myThid .LT. 1 .OR. myThid .GT. nThreads ) THEN        IF ( myThid .LT. 1 .OR. myThid .GT. nThreads ) THEN
87         WRITE(0,*) '!!!!!!! PANIC !!!!!!! CATASTROPHIC ERROR'         WRITE(0,*) '!!!!!!! PANIC !!!!!!! CATASTROPHIC ERROR'
88         WRITE(0,*) '!!!!!!! PANIC !!!!!!! in S/R BARRIER  myThid = ', myThid, ' nThreads = ', nThreads         WRITE(0,*) '!!!!!!! PANIC !!!!!!! in S/R BARRIER  myThid = ',
89         &  myThid, ' nThreads = ', nThreads
90         STOP 'ABNROMAL END: S/R BARRIER'         STOP 'ABNROMAL END: S/R BARRIER'
91        ENDIF        ENDIF
92    
93  C--   When every threads key1 is valid thread 1 will open door1.  C--   When every threads key1 is valid thread 1 will open door1.
94        IF ( key1(1,myThid) .EQ. VALID ) THEN        IF ( key1(1,myThid) .EQ. VALID ) THEN
95         WRITE(0,*) '!!!!!!! PANIC !!!!!!! CATASTROPHIC ERROR'         WRITE(0,*) '!!!!!!! PANIC !!!!!!! CATASTROPHIC ERROR'
96         WRITE(0,*) '!!!!!!! PANIC !!!!!!! in S/R BARRIER  myThid = ', myThid, ' key1 already validated'         WRITE(0,*) '!!!!!!! PANIC !!!!!!! in S/R BARRIER  myThid = ',
97         &  myThid, ' key1 already validated'
98         STOP 'ABNROMAL END: S/R BARRIER'         STOP 'ABNROMAL END: S/R BARRIER'
99        ENDIF        ENDIF
100        key1(1,myThid) = VALID        key1(1,myThid) = VALID
# Line 131  C--   door3 because they have to go thro Line 133  C--   door3 because they have to go thro
133  C--   When every threads key2 is valid thread 1 will open door2.  C--   When every threads key2 is valid thread 1 will open door2.
134  C     Notes  C     Notes
135  C     =====  C     =====
 C      I don't understand memory ordering and sequential consistency.  
136  C     I think that to work with any memory model ( i.e. relaxed,  C     I think that to work with any memory model ( i.e. relaxed,
137  C     partial store, total store) the variables key1, key2 and key3  C     partial store, total store) the variables key1, key2 and key3
138  C     might need to be set to invalid by thread 1.  C     might need to be set to invalid by thread 1.
139  C      C    
140        IF ( key2(1,myThid) .EQ. VALID ) THEN        IF ( key2(1,myThid) .EQ. VALID ) THEN
141         WRITE(0,*) '!!!!!!! PANIC !!!!!!! CATASTROPHIC ERROR'         WRITE(0,*) '!!!!!!! PANIC !!!!!!! CATASTROPHIC ERROR'
142         WRITE(0,*) '!!!!!!! PANIC !!!!!!! in S/R BARRIER  myThid = ', myThid, ' key2 already validated'         WRITE(0,*) '!!!!!!! PANIC !!!!!!! in S/R BARRIER  myThid = ',
143         &  myThid, ' key2 already validated'
144         STOP 'ABNROMAL END: S/R BARRIER'         STOP 'ABNROMAL END: S/R BARRIER'
145        ENDIF        ENDIF
146        key2(1,myThid) = VALID        key2(1,myThid) = VALID
# Line 173  C--   door1 because they have to go thro Line 175  C--   door1 because they have to go thro
175  C--   When every threads key3 is valid thread 1 will open door3.  C--   When every threads key3 is valid thread 1 will open door3.
176        IF ( key3(1,myThid) .EQ. VALID ) THEN        IF ( key3(1,myThid) .EQ. VALID ) THEN
177         WRITE(0,*) '!!!!!!! PANIC !!!!!!! CATASTROPHIC ERROR'         WRITE(0,*) '!!!!!!! PANIC !!!!!!! CATASTROPHIC ERROR'
178         WRITE(0,*) '!!!!!!! PANIC !!!!!!! in S/R BARRIER  myThid = ', myThid, ' key3 already validated'         WRITE(0,*) '!!!!!!! PANIC !!!!!!! in S/R BARRIER  myThid = ',
179         &  myThid, ' key3 already validated'
180         STOP 'ABNROMAL END: S/R BARRIER'         STOP 'ABNROMAL END: S/R BARRIER'
181        ENDIF        ENDIF
182        key3(1,myThid) = VALID        key3(1,myThid) = VALID
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