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C $Id$ |
C $Header$ |
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#include "CPP_EEOPTIONS.h" |
#include "CPP_EEOPTIONS.h" |
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SUBROUTINE BARRIER_INIT |
SUBROUTINE BARRIER_INIT |
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IMPLICIT NONE |
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#include "SIZE.h" |
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#include "EEPARAMS.h" |
#include "EEPARAMS.h" |
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#include "EESUPPORT.h" |
#include "EESUPPORT.h" |
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#include "BARRIER.h" |
#include "BARRIER.h" |
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C | Also we have to be a bit careful regarding sequential | |
C | Also we have to be a bit careful regarding sequential | |
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C | consistency - or lack of it. At the moment the code | |
C | consistency - or lack of it. At the moment the code | |
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C | assumes a total store order memory model, which some | |
C | assumes a total store order memory model, which some | |
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C | machines don't have! However, I have yet to find a | |
C | machines do not have! However, I have yet to find a | |
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C | problem with this I think because the tolerances in | |
C | problem with this I think because the tolerances in | |
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C | terms of memory ordering i.e. a little bit of reordering | |
C | terms of memory ordering i.e. a little bit of reordering | |
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C | probably won't break the barrier mechanism! | |
C | probably will not break the barrier mechanism! | |
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C | On non-cache coherent systems e.g. T3E we need to use | |
C | On non-cache coherent systems e.g. T3E we need to use | |
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C | a library function to do barriers. | |
C | a library function to do barriers. | |
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C | Note - The PANIC tests can be removed for working code | |
C | Note - The PANIC tests can be removed for working code | |
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C | stopping in these PANIC blocks then something is | |
C | stopping in these PANIC blocks then something is | |
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C | wrong with your program and it needs to be fixed. | |
C | wrong with your program and it needs to be fixed. | |
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C \==========================================================/ |
C \==========================================================/ |
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#include "SIZE.h" |
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#include "EEPARAMS.h" |
#include "EEPARAMS.h" |
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#include "EESUPPORT.h" |
#include "EESUPPORT.h" |
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#include "BARRIER.h" |
#include "BARRIER.h" |
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INTEGER I |
INTEGER I |
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CcnhDebugStarts |
CcnhDebugStarts |
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C IF ( myThid .EQ. 1 ) THEN |
C WRITE(myThid,*) ' Barrier entered ' |
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C WRITE(0,*) ' Barrier entered ' |
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C ENDIF |
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CcnhDebugEnds |
CcnhDebugEnds |
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C-- Check that thread number is expected range |
C-- Check that thread number is expected range |
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IF ( myThid .LT. 1 .OR. myThid .GT. nThreads ) THEN |
IF ( myThid .LT. 1 .OR. myThid .GT. nThreads ) THEN |
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WRITE(0,*) '!!!!!!! PANIC !!!!!!! CATASTROPHIC ERROR' |
WRITE(0,*) '!!!!!!! PANIC !!!!!!! CATASTROPHIC ERROR' |
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WRITE(0,*) '!!!!!!! PANIC !!!!!!! in S/R BARRIER myThid = ', myThid, ' nThreads = ', nThreads |
WRITE(0,*) '!!!!!!! PANIC !!!!!!! in S/R BARRIER myThid = ', |
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& myThid, ' nThreads = ', nThreads |
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STOP 'ABNROMAL END: S/R BARRIER' |
STOP 'ABNROMAL END: S/R BARRIER' |
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ENDIF |
ENDIF |
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C-- When every threads key1 is valid thread 1 will open door1. |
C-- When every threads key1 is valid thread 1 will open door1. |
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IF ( key1(1,myThid) .EQ. VALID ) THEN |
IF ( key1(1,myThid) .EQ. VALID ) THEN |
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WRITE(0,*) '!!!!!!! PANIC !!!!!!! CATASTROPHIC ERROR' |
WRITE(0,*) '!!!!!!! PANIC !!!!!!! CATASTROPHIC ERROR' |
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WRITE(0,*) '!!!!!!! PANIC !!!!!!! in S/R BARRIER myThid = ', myThid, ' key1 already validated' |
WRITE(0,*) '!!!!!!! PANIC !!!!!!! in S/R BARRIER myThid = ', |
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& myThid, ' key1 already validated' |
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STOP 'ABNROMAL END: S/R BARRIER' |
STOP 'ABNROMAL END: S/R BARRIER' |
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ENDIF |
ENDIF |
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key1(1,myThid) = VALID |
key1(1,myThid) = VALID |
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C-- When every threads key2 is valid thread 1 will open door2. |
C-- When every threads key2 is valid thread 1 will open door2. |
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C Notes |
C Notes |
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C ===== |
C ===== |
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C I don't understand memory ordering and sequential consistency. |
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C I think that to work with any memory model ( i.e. relaxed, |
C I think that to work with any memory model ( i.e. relaxed, |
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C partial store, total store) the variables key1, key2 and key3 |
C partial store, total store) the variables key1, key2 and key3 |
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C might need to be set to invalid by thread 1. |
C might need to be set to invalid by thread 1. |
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C |
C |
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IF ( key2(1,myThid) .EQ. VALID ) THEN |
IF ( key2(1,myThid) .EQ. VALID ) THEN |
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WRITE(0,*) '!!!!!!! PANIC !!!!!!! CATASTROPHIC ERROR' |
WRITE(0,*) '!!!!!!! PANIC !!!!!!! CATASTROPHIC ERROR' |
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WRITE(0,*) '!!!!!!! PANIC !!!!!!! in S/R BARRIER myThid = ', myThid, ' key2 already validated' |
WRITE(0,*) '!!!!!!! PANIC !!!!!!! in S/R BARRIER myThid = ', |
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& myThid, ' key2 already validated' |
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STOP 'ABNROMAL END: S/R BARRIER' |
STOP 'ABNROMAL END: S/R BARRIER' |
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ENDIF |
ENDIF |
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key2(1,myThid) = VALID |
key2(1,myThid) = VALID |
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C-- When every threads key3 is valid thread 1 will open door3. |
C-- When every threads key3 is valid thread 1 will open door3. |
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IF ( key3(1,myThid) .EQ. VALID ) THEN |
IF ( key3(1,myThid) .EQ. VALID ) THEN |
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WRITE(0,*) '!!!!!!! PANIC !!!!!!! CATASTROPHIC ERROR' |
WRITE(0,*) '!!!!!!! PANIC !!!!!!! CATASTROPHIC ERROR' |
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WRITE(0,*) '!!!!!!! PANIC !!!!!!! in S/R BARRIER myThid = ', myThid, ' key3 already validated' |
WRITE(0,*) '!!!!!!! PANIC !!!!!!! in S/R BARRIER myThid = ', |
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& myThid, ' key3 already validated' |
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STOP 'ABNROMAL END: S/R BARRIER' |
STOP 'ABNROMAL END: S/R BARRIER' |
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ENDIF |
ENDIF |
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key3(1,myThid) = VALID |
key3(1,myThid) = VALID |
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ENDIF |
ENDIF |
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CcnhDebugStarts |
CcnhDebugStarts |
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C IF ( myThid .EQ. 1 ) THEN |
C WRITE(myThid,*) ' Barrier exited ' |
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C WRITE(0,*) ' Barrier exited ' |
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C ENDIF |
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CcnhDebugEnds |
CcnhDebugEnds |
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RETURN |
RETURN |
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END |
END |
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C $Id$ |
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